Vivado常用IP例化1
本文主要列举Vivado中一些常用IP的例化。
1 存储器类
1.1 分布式RAM
- ROM
trom trom_i ( .clk (clk), .a (addra_w[m]), .qspo(douta_w[m]) ); - 简单双端口RAM
tram tram_real ( .clk (clk), .we (wea), .a (addra_x), .d (dina_xreal), .dpra(addrb_x), .qdpo(doutb_xreal) ); - 真双端口RAM
tram tram_real ( .clk (clk), .we (wea), .a (addra_x), .d (dina_xreal), .spo (douta_xreal), .dpra(addrb_x), .qdpo(doutb_xreal) );
1.2 BRAM
- 简单双端口RAM
bram_conv bram_conv_i ( .clka (sclk), .wea (wea_conv), .addra(addra), .dina (dout_load), .clkb (sclk), .addrb(addrb_conv), .doutb(din_coef) ); - 真双端口RAM
bram bram_i ( .clka (sclk), .wea (wea_fft), .addra(addra), .dina (dout_load), .douta(din_load), .clkb (sclk), .web (web_turn), .addrb(addrb), .dinb (dout_turn), .doutb(din_fft) ); - AXI端口RAM
bram_init bram_init_i ( .s_aclk (sclk), .s_aresetn (rst_n), .s_axi_awready(axi_fft_awready), .s_axi_awvalid(axi_fft_awvalid), .s_axi_awaddr (axi_fft_awaddr[31:0]), .s_axi_wready (axi_fft_wready), .s_axi_wvalid (axi_fft_wvalid), .s_axi_wdata (axi_fft_wdata), .s_axi_wstrb (axi_fft_wstrb), .s_axi_wlast (axi_fft_wlast), .s_axi_bready (axi_fft_bready), .s_axi_bvalid (axi_fft_bvalid), .s_axi_bresp (axi_fft_bresp), .s_axi_awlen (axi_fft_awlen), .s_axi_awsize (axi_fft_awsize), .s_axi_awburst(axi_fft_awburst), .s_axi_awid (4'd0), .s_axi_bid (), .s_axi_arready(axi_fft_arready), .s_axi_arvalid(axi_fft_arvalid), .s_axi_araddr (axi_fft_araddr[31:0]), .s_axi_rready (axi_fft_rready), .s_axi_rvalid (axi_fft_rvalid), .s_axi_rdata (axi_fft_rdata), .s_axi_rlast (axi_fft_rlast), .s_axi_rresp (axi_fft_rresp), .s_axi_arlen (axi_fft_arlen), .s_axi_arsize (axi_fft_arsize), .s_axi_arburst(axi_fft_arburst), .s_axi_arid (4'd0), .s_axi_rid () );
1.3 URAM
- 简单双端口RAM
xpm_memory_sdpram #( .ADDR_WIDTH_A (ADDR_WIDTH), .ADDR_WIDTH_B (ADDR_WIDTH), .AUTO_SLEEP_TIME (0), .BYTE_WRITE_WIDTH_A (TDATA_BYTES_MM*8), .CASCADE_HEIGHT (0), .CLOCKING_MODE ("common_clock"), .ECC_MODE ("no_ecc"), .MEMORY_INIT_FILE ("none"), .MEMORY_INIT_PARAM ("0"), .MEMORY_OPTIMIZATION ("true"), .MEMORY_PRIMITIVE ("ultra"), .MEMORY_SIZE (RAM_DEPTH*TDATA_BYTES_MM*8), .MESSAGE_CONTROL (0), .READ_DATA_WIDTH_B (TDATA_BYTES_MM*8), .READ_LATENCY_B (2), .READ_RESET_VALUE_B ("0"), .RST_MODE_A ("SYNC"), .RST_MODE_B ("SYNC"), .SIM_ASSERT_CHK (0), .USE_EMBEDDED_CONSTRAINT(0), .USE_MEM_INIT (1), .WAKEUP_TIME ("disable_sleep"), .WRITE_DATA_WIDTH_A (TDATA_BYTES_MM*8), .WRITE_MODE_B ("read_first") ) xpm_memory_sdpram_i ( .clka (sclk), .wea (wea_conv[i]), .ena (1'b1), .addra (addra), .dina (dout_load[i][255:0]), .clkb (sclk), .enb (1'b1), .addrb (addrb_conv), .doutb (din_coef[i]), .dbiterrb (), .sbiterrb (), .injectdbiterra(1'b0), .injectsbiterra(1'b0), .regceb (1'b1), .rstb (1'b0), .sleep (1'b0) ); - 真双端口RAM
xpm_memory_tdpram #( .ADDR_WIDTH_A (ADDR_WIDTH), .ADDR_WIDTH_B (ADDR_WIDTH), .AUTO_SLEEP_TIME (0), .BYTE_WRITE_WIDTH_A (TDATA_BYTES*8), .BYTE_WRITE_WIDTH_B (TDATA_BYTES*8), .CASCADE_HEIGHT (0), .CLOCKING_MODE ("common_clock"), .ECC_MODE ("no_ecc"), .MEMORY_INIT_FILE ("none"), .MEMORY_INIT_PARAM ("0"), .MEMORY_OPTIMIZATION ("true"), .MEMORY_PRIMITIVE ("ultra"), .MEMORY_SIZE (RAM_DEPTH*TDATA_BYTES*8), .MESSAGE_CONTROL (0), .READ_DATA_WIDTH_A (TDATA_BYTES*8), .READ_DATA_WIDTH_B (TDATA_BYTES*8), .READ_LATENCY_A (4), .READ_LATENCY_B (4), .READ_RESET_VALUE_A ("0"), .READ_RESET_VALUE_B ("0"), .RST_MODE_A ("SYNC"), .RST_MODE_B ("SYNC"), .SIM_ASSERT_CHK (0), .USE_EMBEDDED_CONSTRAINT(0), .USE_MEM_INIT (1), .WAKEUP_TIME ("disable_sleep"), .WRITE_DATA_WIDTH_A (TDATA_BYTES*8), .WRITE_DATA_WIDTH_B (TDATA_BYTES*8), .WRITE_MODE_A ("no_change"), .WRITE_MODE_B ("no_change") ) xpm_memory_tdpram_i ( .clka (sclk), .wea (wea_fft[i]), .ena (1'b1), .addra (addra), .dina (dout_load[i]), .douta (din_load[i]), .clkb (sclk), .web (web_turn[i]), .enb (1'b1), .addrb (addrb), .dinb (dout_turn[i]), .doutb (din_fft[i]), .dbiterra (), .dbiterrb (), .sbiterra (), .sbiterrb (), .injectdbiterra(1'b0), .injectdbiterrb(1'b0), .injectsbiterra(1'b0), .injectsbiterrb(1'b0), .regcea (1'b1), .regceb (1'b1), .rsta (1'b0), .rstb (1'b0), .sleep (1'b0) );
1.4 FIFO
fifo_turn fifo_turn_i(
.clk(sclk),
.wr_en(done_cmpt),
.din (din_turn[m]),
.full (),
.rd_en(rd_en[m]),
.dout (dout[m]),
.empty()
);
2 接口互联类
2.1 AXI互联接口
wire [NUM_GROUP-1:0] s_axi_awready;
wire [NUM_GROUP-1:0] s_axi_awvalid;
wire [AWIDTH_HBM-1:0] s_axi_awaddr [NUM_GROUP-1:0];
wire [1:0] s_axi_awburst [NUM_GROUP-1:0];
wire [3:0] s_axi_awcache [NUM_GROUP-1:0];
wire [7:0] s_axi_awlen [NUM_GROUP-1:0];
wire [2:0] s_axi_awsize [NUM_GROUP-1:0];
wire [NUM_GROUP-1:0] s_axi_wready;
wire [NUM_GROUP-1:0] s_axi_wvalid;
wire [DWIDTH_HBM*8-1:0] s_axi_wdata [NUM_GROUP-1:0];
wire [DWIDTH_HBM-1:0] s_axi_wstrb [NUM_GROUP-1:0];
wire [NUM_GROUP-1:0] s_axi_wlast;
wire [NUM_GROUP-1:0] s_axi_bready;
wire [NUM_GROUP-1:0] s_axi_bvalid;
wire [1:0] s_axi_bresp [NUM_GROUP-1:0];
wire [NUM_GROUP-1:0] s_axi_arready;
wire [NUM_GROUP-1:0] s_axi_arvalid;
wire [AWIDTH_HBM-1:0] s_axi_araddr [NUM_GROUP-1:0];
wire [1:0] s_axi_arburst [NUM_GROUP-1:0];
wire [3:0] s_axi_arcache [NUM_GROUP-1:0];
wire [7:0] s_axi_arlen [NUM_GROUP-1:0];
wire [2:0] s_axi_arsize [NUM_GROUP-1:0];
wire [NUM_GROUP-1:0] s_axi_rready;
wire [NUM_GROUP-1:0] s_axi_rvalid;
wire [DWIDTH_HBM*8-1:0] s_axi_rdata [NUM_GROUP-1:0];
wire [NUM_GROUP-1:0] s_axi_rlast;
wire [1:0] s_axi_rresp [NUM_GROUP-1:0];
wire [NUM_GROUP-1:0] m_axi_awready;
wire [NUM_GROUP-1:0] m_axi_awvalid;
wire [AWIDTH_HBM-1:0] m_axi_awaddr [NUM_GROUP-1:0];
wire [1:0] m_axi_awburst [NUM_GROUP-1:0];
wire [3:0] m_axi_awcache [NUM_GROUP-1:0];
wire [7:0] m_axi_awlen [NUM_GROUP-1:0];
wire [2:0] m_axi_awsize [NUM_GROUP-1:0];
wire [NUM_GROUP-1:0] m_axi_wready;
wire [NUM_GROUP-1:0] m_axi_wvalid;
wire [DWIDTH_LOAD*8-1:0] m_axi_wdata [NUM_GROUP-1:0];
wire [DWIDTH_LOAD-1:0] m_axi_wstrb [NUM_GROUP-1:0];
wire [NUM_GROUP-1:0] m_axi_wlast;
wire [NUM_GROUP-1:0] m_axi_bready;
wire [NUM_GROUP-1:0] m_axi_bvalid;
wire [1:0] m_axi_bresp [NUM_GROUP-1:0];
wire [NUM_GROUP-1:0] m_axi_arready;
wire [NUM_GROUP-1:0] m_axi_arvalid;
wire [AWIDTH_HBM-1:0] m_axi_araddr [NUM_GROUP-1:0];
wire [1:0] m_axi_arburst [NUM_GROUP-1:0];
wire [3:0] m_axi_arcache [NUM_GROUP-1:0];
wire [7:0] m_axi_arlen [NUM_GROUP-1:0];
wire [2:0] m_axi_arsize [NUM_GROUP-1:0];
wire [NUM_GROUP-1:0] m_axi_rready;
wire [NUM_GROUP-1:0] m_axi_rvalid;
wire [DWIDTH_LOAD*8-1:0] m_axi_rdata [NUM_GROUP-1:0];
wire [NUM_GROUP-1:0] m_axi_rlast;
wire [1:0] m_axi_rresp [NUM_GROUP-1:0];
axi_itct axi_itct_i(
.INTERCONNECT_ACLK (sclk),
.INTERCONNECT_ARESETN(rst_n),
.S00_AXI_ACLK (sclk),
.S00_AXI_ARESET_OUT_N(),
.M00_AXI_ACLK (hbm_aclk),
.M00_AXI_ARESET_OUT_N(),
.S00_AXI_AWREADY (m_axi_awready[m]),
.S00_AXI_AWVALID (m_axi_awvalid[m]),
.S00_AXI_AWADDR (m_axi_awaddr [m]),
.S00_AXI_WREADY (m_axi_wready [m]),
.S00_AXI_WVALID (m_axi_wvalid [m]),
.S00_AXI_WDATA (m_axi_wdata [m]),
.S00_AXI_WSTRB (m_axi_wstrb [m]),
.S00_AXI_WLAST (m_axi_wlast [m]),
.S00_AXI_BREADY (m_axi_bready [m]),
.S00_AXI_BVALID (m_axi_bvalid [m]),
.S00_AXI_BRESP (m_axi_bresp [m]),
.S00_AXI_AWLEN (m_axi_awlen [m]),
.S00_AXI_AWSIZE (m_axi_awsize [m]),
.S00_AXI_AWBURST (m_axi_awburst[m]),
.S00_AXI_AWCACHE (m_axi_awcache[m]),
.S00_AXI_ARREADY (m_axi_arready[m]),
.S00_AXI_ARVALID (m_axi_arvalid[m]),
.S00_AXI_ARADDR (m_axi_araddr [m]),
.S00_AXI_RREADY (m_axi_rready [m]),
.S00_AXI_RVALID (m_axi_rvalid [m]),
.S00_AXI_RDATA (m_axi_rdata [m]),
.S00_AXI_RLAST (m_axi_rlast [m]),
.S00_AXI_RRESP (m_axi_rresp [m]),
.S00_AXI_ARLEN (m_axi_arlen [m]),
.S00_AXI_ARSIZE (m_axi_arsize [m]),
.S00_AXI_ARBURST (m_axi_arburst[m]),
.S00_AXI_ARCACHE (m_axi_arcache[m]),
.S00_AXI_AWID (1'b0),
.S00_AXI_BID (),
.S00_AXI_AWLOCK (1'b0),
.S00_AXI_AWPROT (3'd0),
.S00_AXI_AWQOS (4'd0),
.S00_AXI_ARID (1'b0),
.S00_AXI_RID (),
.S00_AXI_ARLOCK (1'b0),
.S00_AXI_ARPROT (3'd0),
.S00_AXI_ARQOS (4'd0),
.M00_AXI_AWREADY (s_axi_awready[m]),
.M00_AXI_AWVALID (s_axi_awvalid[m]),
.M00_AXI_AWADDR (s_axi_awaddr [m]),
.M00_AXI_WREADY (s_axi_wready [m]),
.M00_AXI_WVALID (s_axi_wvalid [m]),
.M00_AXI_WDATA (s_axi_wdata [m]),
.M00_AXI_WSTRB (s_axi_wstrb [m]),
.M00_AXI_WLAST (s_axi_wlast [m]),
.M00_AXI_BREADY (s_axi_bready [m]),
.M00_AXI_BVALID (s_axi_bvalid [m]),
.M00_AXI_BRESP (s_axi_bresp [m]),
.M00_AXI_AWLEN (s_axi_awlen [m]),
.M00_AXI_AWSIZE (s_axi_awsize [m]),
.M00_AXI_AWBURST (s_axi_awburst[m]),
.M00_AXI_AWCACHE (s_axi_awcache[m]),
.M00_AXI_ARREADY (s_axi_arready[m]),
.M00_AXI_ARVALID (s_axi_arvalid[m]),
.M00_AXI_ARADDR (s_axi_araddr [m]),
.M00_AXI_RREADY (s_axi_rready [m]),
.M00_AXI_RVALID (s_axi_rvalid [m]),
.M00_AXI_RDATA (s_axi_rdata [m]),
.M00_AXI_RLAST (s_axi_rlast [m]),
.M00_AXI_RRESP (s_axi_rresp [m]),
.M00_AXI_ARLEN (s_axi_arlen [m]),
.M00_AXI_ARSIZE (s_axi_arsize [m]),
.M00_AXI_ARBURST (s_axi_arburst[m]),
.M00_AXI_ARCACHE (s_axi_arcache[m]),
.M00_AXI_BID (3'd0),
.M00_AXI_AWLOCK (),
.M00_AXI_AWPROT (),
.M00_AXI_AWQOS (),
.M00_AXI_AWID (),
.M00_AXI_RID (3'd0),
.M00_AXI_ARLOCK (),
.M00_AXI_ARPROT (),
.M00_AXI_ARQOS (),
.M00_AXI_ARID ()
);
2.2 AXIS互联接口
output cus_axis_tready,
input cus_axis_tvalid,
input [DWIDTH_NET*8-1:0] cus_axis_tdata,
input [DWIDTH_NET-1:0] cus_axis_tkeep,
input cus_axis_tlast,
input cum_axis_tready,
output cum_axis_tvalid,
output [DWIDTH_NET*8-1:0] cum_axis_tdata,
output [DWIDTH_NET-1:0] cum_axis_tkeep,
output cum_axis_tlast
axis_interconnect_asyn axis_interconnect_rs (
.ACLK (cus_axis_aclk),
.ARESETN(cus_axis_aresetn),
.S00_DECODE_ERR (),
.S00_FIFO_DATA_COUNT(),
.S00_AXIS_ACLK (cus_axis_aclk),
.S00_AXIS_ARESETN(cus_axis_aresetn),
.S00_AXIS_TREADY (cus_axis_tready),
.S00_AXIS_TVALID (cus_axis_tvalid),
.S00_AXIS_TDATA (cus_axis_tdata),
.S00_AXIS_TKEEP (cus_axis_tkeep),
.S00_AXIS_TLAST (cus_axis_tlast),
.S00_AXIS_TDEST (1'b1),
.M00_AXIS_ACLK (cus_axis_aclk),
.M00_AXIS_ARESETN(cus_axis_aresetn),
.M00_AXIS_TREADY (cum_axis_tready),
.M00_AXIS_TVALID (cum_axis_tvalid),
.M00_AXIS_TDATA (cum_axis_tdata),
.M00_AXIS_TKEEP (cum_axis_tkeep),
.M00_AXIS_TLAST (cum_axis_tlast),
.M00_AXIS_TDEST (),
);
2.3 接口转换
wire s_axis_s2mm_cmd_tready;
wire s_axis_s2mm_cmd_tvalid;
wire [CMD_BYTES*8-1:0] s_axis_s2mm_cmd_tdata;
wire m_axis_s2mm_sts_tready;
wire m_axis_s2mm_sts_tvalid;
wire [7:0] m_axis_s2mm_sts_tdata;
wire [0:0] m_axis_s2mm_sts_tkeep;
wire m_axis_s2mm_sts_tlast;
wire s_axis_mm2s_cmd_tready;
wire s_axis_mm2s_cmd_tvalid;
wire [CMD_BYTES*8-1:0] s_axis_mm2s_cmd_tdata;
wire m_axis_mm2s_sts_tready;
wire m_axis_mm2s_sts_tvalid;
wire [7:0] m_axis_mm2s_sts_tdata;
wire [0:0] m_axis_mm2s_sts_tkeep;
wire m_axis_mm2s_sts_tlast;
axi_datamover_rm axi_datamover_inst (
.m_axi_s2mm_aclk (xdma_axis_aclk),
.m_axi_s2mm_aresetn (xdma_axis_aresetn),
.m_axis_s2mm_cmdsts_awclk (xdma_axis_aclk),
.m_axis_s2mm_cmdsts_aresetn(xdma_axis_aresetn),
.s_axis_s2mm_tready (s_axis_s2mm_tready),
.s_axis_s2mm_tvalid (s_axis_s2mm_tvalid),
.s_axis_s2mm_tdata (s_axis_s2mm_tdata),
.s_axis_s2mm_tkeep (s_axis_s2mm_tkeep),
.s_axis_s2mm_tlast (s_axis_s2mm_tlast),
.m_axi_s2mm_awready (m_axi_s2mm_awready),
.m_axi_s2mm_awvalid (m_axi_s2mm_awvalid),
.m_axi_s2mm_awaddr (m_axi_s2mm_awaddr),
.m_axi_s2mm_wready (m_axi_s2mm_wready),
.m_axi_s2mm_wvalid (m_axi_s2mm_wvalid),
.m_axi_s2mm_wdata (m_axi_s2mm_wdata),
.m_axi_s2mm_wstrb (m_axi_s2mm_wstrb),
.m_axi_s2mm_wlast (m_axi_s2mm_wlast),
.m_axi_s2mm_bready (m_axi_s2mm_bready),
.m_axi_s2mm_bvalid (m_axi_s2mm_bvalid),
.m_axi_s2mm_bresp (m_axi_s2mm_bresp),
.m_axi_s2mm_awid (m_axi_s2mm_awid),
.m_axi_s2mm_awlen (m_axi_s2mm_awlen),
.m_axi_s2mm_awsize (m_axi_s2mm_awsize),
.m_axi_s2mm_awburst (m_axi_s2mm_awburst),
.m_axi_s2mm_awprot (m_axi_s2mm_awprot),
.m_axi_s2mm_awcache (m_axi_s2mm_awcache),
.m_axi_s2mm_awuser (m_axi_s2mm_awuser),
.s_axis_s2mm_cmd_tready (s_axis_s2mm_cmd_tready),
.s_axis_s2mm_cmd_tvalid (s_axis_s2mm_cmd_tvalid),
.s_axis_s2mm_cmd_tdata (s_axis_s2mm_cmd_tdata),
.m_axis_s2mm_sts_tready (m_axis_s2mm_sts_tready),
.m_axis_s2mm_sts_tvalid (m_axis_s2mm_sts_tvalid),
.m_axis_s2mm_sts_tdata (m_axis_s2mm_sts_tdata),
.m_axis_s2mm_sts_tkeep (m_axis_s2mm_sts_tkeep),
.m_axis_s2mm_sts_tlast (m_axis_s2mm_sts_tlast),
.s2mm_err (s2mm_err),
.m_axi_mm2s_aclk (xdma_axis_aclk),
.m_axi_mm2s_aresetn (xdma_axis_aresetn),
.m_axis_mm2s_cmdsts_aclk (xdma_axis_aclk),
.m_axis_mm2s_cmdsts_aresetn(xdma_axis_aresetn),
.m_axi_mm2s_arready (m_axi_mm2s_arready),
.m_axi_mm2s_arvalid (m_axi_mm2s_arvalid),
.m_axi_mm2s_araddr (m_axi_mm2s_araddr),
.m_axi_mm2s_rready (m_axi_mm2s_rready),
.m_axi_mm2s_rvalid (m_axi_mm2s_rvalid),
.m_axi_mm2s_rdata (m_axi_mm2s_rdata),
.m_axi_mm2s_rlast (m_axi_mm2s_rlast),
.m_axi_mm2s_rresp (m_axi_mm2s_rresp),
.m_axi_mm2s_arid (m_axi_mm2s_arid),
.m_axi_mm2s_arlen (m_axi_mm2s_arlen),
.m_axi_mm2s_arsize (m_axi_mm2s_arsize),
.m_axi_mm2s_arburst (m_axi_mm2s_arburst),
.m_axi_mm2s_arprot (m_axi_mm2s_arprot),
.m_axi_mm2s_arcache (m_axi_mm2s_arcache),
.m_axi_mm2s_aruser (m_axi_mm2s_aruser),
.m_axis_mm2s_tready (m_axis_mm2s_tready),
.m_axis_mm2s_tvalid (m_axis_mm2s_tvalid),
.m_axis_mm2s_tdata (m_axis_mm2s_tdata),
.m_axis_mm2s_tkeep (m_axis_mm2s_tkeep),
.m_axis_mm2s_tlast (m_axis_mm2s_tlast),
.s_axis_mm2s_cmd_tready (s_axis_mm2s_cmd_tready),
.s_axis_mm2s_cmd_tvalid (s_axis_mm2s_cmd_tvalid),
.s_axis_mm2s_cmd_tdata (s_axis_mm2s_cmd_tdata),
.m_axis_mm2s_sts_tready (m_axis_mm2s_sts_tready),
.m_axis_mm2s_sts_tvalid (m_axis_mm2s_sts_tvalid),
.m_axis_mm2s_sts_tdata (m_axis_mm2s_sts_tdata),
.m_axis_mm2s_sts_tkeep (m_axis_mm2s_sts_tkeep),
.m_axis_mm2s_sts_tlast (m_axis_mm2s_sts_tlast),
.mm2s_err (mm2s_err)
);
原文地址：https://blog.csdn.net/weixin_43956013/article/details/144724456
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